Asymmetrical Single Phase Reduced Switch Nine Level Inverter with Trinary Sequence DC Input for PV based Renewable Energy Systems

Document Type : Original Article

Authors

1 Electrical and Electronics Engineering, Mohan Babu University, Tirupati, India

2 Faculty of Electrical and Electronics Engineering, Mohan Babu University, Tirupati, India

3 Faculty of Electronics and Communication Engineering, Mohan Babu University, Tirupati, India

10.22059/jser.2023.359014.1298

Abstract

This paper presents an innovative Asymmetrical Single-Phase Nine Level Inverter (ASRNLI) that stands out among various available configurations. The design achieves a staircase-like voltage pattern with the highest number of levels while utilizing a reduced number of components. Compared to conventional systems, asymmetric multilevel inverters require fewer components yet manage to create a cascade structure with multiple output levels. The ASRNLI configuration consists of two independent DC sources and 10 switches, allowing it to generate any desired level. This setup offers several advantages, including improved output voltage quality attributed to the switches' low blocking voltage. It proves particularly valuable in scenarios where asymmetric DC voltage sources are accessible, such as in modern electric vehicles and AC mini-grids powered by renewable energy sources. To generate gate pulses, the ASRNLI employs the level-shifted pulse width modulation approach. Validation of the suggested ASRNLI configuration was carried out through both MATLAB simulations and the construction of a prototype. The output waveform demonstrated a Total Harmonic Distortion (THD) of 13.50% at the highest fundamental voltage of 400V. Throughout this article, the effectiveness of the ASRNLI configuration is supported by findings from simulations and experimental tests, showcasing its potential as a promising solution for practical applications.

Keywords


  1. Arun, V., Prabhu, S., Prabaharan N. and Shanthi, B. (2022). Modified Structure 9-Level Inverter (MS9LI) With Reduced On-State Switches. IEEE Canadian Journal of Electrical and Computer Engineering, 46(1), 15-23. DOI: 1109/ICJECE.2022.3222215
  2. Arun, V., Kumar, N.M.G. and Prabaharan, N. (2022). A hybrid reference pulse width modulation technique for binary source multilevel inverter. International Journal of Power Electronics and Drive System, 13(2), 980–987. DOI: http://doi.org/10.11591/ijpeds.v13.i2.pp980-987
  3. Arun, V, Stonier, A. A., Peter, G., Kumaresan, P., Reyes, E.M. (2022). A Modified Seven-Level Inverter with Inverted Sine Wave Carrier for PWM Control. International Trans on Elect. Energy Systems, vol. 2022, Article ID 7403079, 12 pages. https://doi.org/10.1155/2022/7403079
  4. Vijayakumar, A., Stonier, A.A., Peter, G., Loganathan, A.K., Ganji, V. (2022). Power quality enhancement in asymmetrical cascaded multilevel inverter using modified carrier level shifted pulse width modulation approach. IET Power-Electron. pp 1– 13. DOI: https://doi.org/10.1049/pel2.12429
  5. Arun, V., Prabhu, S., and Stonier, A. A., (2023) Hybrid Variable Frequency PWM Methods For Seven Level Asymmetrical Inverter (7LAI). International Conference on Power, Instrumentation, Energy and Control (PIECON), Aligarh, India, 2023, pp. 1-4. DOI: 1109/PIECON56912.2023.10085791
  6. Sébastien Mariéthoz. (2014). Design and Control of High-Performance Modular Hybrid Asymmetrical Cascade Multilevel Inverters. IEEE Transactions on Industry Applications, 50(6), 4018-4027. DOI: 1109/TIA.2014.2322133
  7. Venkataramanaiah Jammala, Suresh Yellasiri and Anup Kumar Panda. (2018). Development of a New Hybrid Multilevel Inverter Using Modified Carrier SPWM Switching Strategy. IEEE Transactions on Power Electronics, 33(10), 8192-8197. DOI: 1109/TPEL.2018.2801822
  8. Kamaldeep Boora and Jagdish Kumar. (2019). A Novel Cascaded Asymmetrical Multilevel Inverter with Reduced Number of Switches. IEEE Transactions on Industry Applications, 55 (6), 7389-7399. DOI: 1109/TIA.2019.2933789
  9. Tiago Davi Curi Busarello, Ali Mortezaei , Helmo Kelis Morales Paredes, Ahmed Al-Durra , Jose Antenor Pomilio and Marcelo Godoy Simoes. (2018). Simplified Small-Signal Model for Output Voltage Control of Asymmetric Cascaded H-Bridge Multilevel Inverter. IEEE Transactions On Power Electronics, 33(4), 3509-3519. DOI: 1109/TPEL.2017.2704919
  10. Vafakhah, B., Ewanchuk, J., and Salmon, J. (2011). Multicarrier Interleaved PWM Strategies for a Five-Level NPC Inverter Using a Three-Phase Coupled Inductor. IEEE Transactions on Industry Applications, 47(6), 2549-2558. DOI: 1109/ECCE.2010.5617869
  11. Grandi, G., Loncarski, J., and Dordevic, O. (2015). Analysis and Comparison of Peak-to-Peak Current Ripple in Two-Level and Multilevel PWM Inverters. IEEE Transactions on Industrial Electronics, 62(5), 2721-2730. DOI: 1109/TIE.2014.2363624
  12. Arash A., Boora, Alireza Nami Firuz Zare, Arindam Ghosh and Frede Blaabjerg. (2015). Voltage-Sharing Converter to Supply Single-Phase Asymmetrical Four-Level Diode-Clamped Inverter With High Power Factor Loads. IEEE Transactions On Power Electronics, 25, (10). 2507-2520. DOI: 1109/TPEL.2010.2046651
  13. Anilkumar Chappa Shubhrata Gupta, Lalit Kumar Sahu, Krishna Kumar Gupta and Hani Vahedi. (2022). Fault-Tolerant Asymmetrical Multilevel Inverter With Preserved Output Power Under Post-Fault Operation. IEEE Transactions On Industrial Electronics, 69 (7), 6764-677. DOI: 1109/TIE.2021.3102480
  14. Arun, V., Prabhu, S., Stonier, A. A., and Shanthi, B. Design of Novel Structure Nine Level Trinary Source Inverter. (2023). 9th International Conference on Electrical Energy Systems (ICEES), Chennai, India, 175-178. DOI: 1109/ICEES57979.2023.10110112
  15. Vijayakumar Arun., Kannan, R., Ramesh, S., Vijayakumar, M., Raghavendran, P. S., Siva Ramkumar, M., Anbarasu, P., Venkatesa Prabhu Sundramurthy. (2022). Review on Li-Ion Battery vs Nickel Metal Hydride Battery in EV. Advances in Materials Science and Engineering, 2022, Article ID 7910072, 7 pages. https://doi.org/10.1155/2022/7910072
  16. Babaei, E., Laali. S., and Alilu, S. (2014) Cascaded Multilevel Inverter With Series Connection of Novel H-Bridge Basic Units. in IEEE Transactions on Industrial Electronics, 61(12), 6664-6671. DOI: 1109/TIE.2014.2316264
  17. Babaei, E. And Laali. S. (2015) Optimum Structures of Proposed New Cascaded Multilevel Inverter With Reduced Number of Components. in IEEE Transactions on Industrial Electronics, 62 (11), 6887-6895. DOI: 1109/TIE.2015.2437330
  18. Babaei, E., Laali. S., and Bayat, Z. (2015) A Single-Phase Cascaded Multilevel Inverter Based on a New Basic Unit With Reduced Number of Power Switches. in IEEE Transactions on Industrial Electronics, 62( 2), pp. 922-929. DOI: 1109/TIE.2014.2336601
  19. Samadaei, E., Gholamian, S. A., Sheikholeslami, A., and Adabi, J. (2016) An Envelope Type (E-Type) Module: Asymmetric Multilevel Inverters With Reduced Components. in IEEE Transactions on Industrial Electronics. 63(11), 7148-7156. DOI: 1109/TIE.2016.2520913
  20. Alishah, R. S., Hosseini, S. H., Babaei, E. and Sabahi, M. (2017) Optimal Design of New Cascaded Switch-Ladder Multilevel Inverter Structure. in IEEE Transactions on Industrial Electronics. 64(3), 2072-2080. DOI: 1109/TIE.2016.2627019
  21. Gautam, S. P. (2019) Novel H-Bridge-Based Topology of Multilevel Inverter with Reduced Number of Devices. in IEEE Journal of Emerging and Selected Topics in Power Electronics, 7(4), 2323-2332. DOI: 1109/JESTPE.2018.2881769
  22. Boora, K., and Kumar, J. (2019) A Novel Cascaded Asymmetrical Multilevel Inverter with Reduced Number of Switches. in IEEE Transactions on Industry Applications. 55 (6), 7389-7399. DOI: 1109/TIA.2019.2933789
  23. Majumdar, S., Mahato, B., and Jana, K. C. (2020) Implementation of an Optimum Reduced Components Multicell Multilevel Inverter (MC-MLI) for Lower Standing Voltage, in IEEE Transactions on Industrial Electronics. 67(4), 2765-2775. DOI: 1109/TIE.2019.2913812
  24. Bana, P. R., Panda, K. P., and Panda, G. (2020) Power Quality Performance Evaluation of Multilevel Inverter With Reduced Switching Devices and Minimum Standing Voltage. in IEEE Transactions on Industrial Informatics, 16 (8), 5009-5022. DOI: 1109/TII.2019.2953071
  25. Zeng, J., Lin, W., Cen, D.,  and Liu, J. (2020) Novel K-Type Multilevel Inverter With Reduced Components and Self-Balance.  in IEEE Journal of Emerging and Selected Topics in Power Electronics, 8(4), 4343-4354. DOI: 1109/JESTPE.2019.2939562
  26. Prabaharan, N. Salam, Z., Cecati, C., and Palanisamy, K.  (2020) Design and Implementation of New Multilevel Inverter Topology for Trinary Sequence Using Unipolar Pulse width Modulation. in IEEE Transactions on Industrial Electronics. 67 (5), 3573-3582. DOI: 1109/TIE.2019.2914636
  27. Salem, H., Van Khang, K. G., Robbersmyr, M., Norambuena, and Rodriguez, J. (2021) Voltage Source Multilevel Inverters With Reduced Device Count: Topological Review and Novel Comparative Factors. in IEEE Transactions on Power Electronics, 36(3), 2720-2747. DOI: 1109/TPEL.2020.3011908.
  28. Mondol, M. H., Biswas, S. P., Rahman, M. A., Islam, M. R., Mahfuz-Ur-Rahman, A. M., and Muttaqi, K. M. (2022) A New Hybrid Multilevel Inverter Topology With Level Shifted Multicarrier PWM Technique for Harvesting Renewable Energy. in IEEE Transactions on Industry Applications, 58(2), 2574-2585. DOI: 1109/IAS44978.2020.9334754.
  29. Akbari, J., Ebrahimi, Y., Jafarian and Bakhshai, A. (2022) A Multilevel Inverter Topology With an Improved Reliability and a Reduced Number of Components. in IEEE Journal of Emerging and Selected Topics in Power Electronics, 10 (1), 553-563. DOI: 1109/JESTPE.2021.3089867
  30. Pal, P. K., Jana, K. C., Siwakoti, Y. P., Majumdar, S., and Blaabjerg, F. An Active-Neutral-Point-Clamped Switched-Capacitor Multilevel Inverter With Quasi-Resonant Capacitor Charging, in IEEE Transactions on Power Electronics, 37(12), 14888-14901. DOI: 1109/TPEL.2022.3187736
  31.